Cadence says PCIe 6.0 PHY and controller cleared first-pass at compliance workshop
Cadence announced its PCIe 6.0 PHY and controller IP, implemented in TSMC N3, achieved first-pass success at a PCI-SIG compliance workshop in late July.
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Cadence announced its PCIe 6.0 PHY and controller IP, implemented in TSMC N3, achieved first-pass success at a PCI-SIG compliance workshop in late July.