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Atomera Q2 2026 Earnings Call: Complete Transcript

Atomera (NASDAQ: ATOM ) released second-quarter financial results and hosted an earnings call on Tuesday. Read the complete transcript below. This transcript is brought to you APIs. For real-time access to our entire catalog, please visit for a consultation. The full earnings call is available at Summary Atomera reported Q2 2026 revenue of $158,000, primarily from wafer deliveries, with a GAAP net loss of $6.3 million, or $0.17 per share. The company achieved significant milestones in gate-all-around technology with two active customers, indicating progress towards potential licensing agreements. Atomera is seeing accelerated interest from memory manufacturers, particularly in DRAM and NAND, driven by AI demand and the shift to advanced architectures. The company's GaN on silicon technology demonstrated groundbreaking RF performance improvements, potentially opening new market opportunities. Operating expenses increased due to higher general and administrative costs, with expectations to end 2026 at the high end of projected non-GAAP operating expenses. Full Transcript Mike Bishop, Investor Relations We will begin in just a moment. Hello everyone and welcome to Atomera's second qua

ATOM

Atomera (NASDAQ: ATOM ) released second-quarter financial results and hosted an earnings call on Tuesday. Read the complete transcript below. This transcript is brought to you APIs. For real-time access to our entire catalog, please visit for a consultation.

17 per share. The company achieved significant milestones in gate-all-around technology with two active customers, indicating progress towards potential licensing agreements. Atomera is seeing accelerated interest from memory manufacturers, particularly in DRAM and NAND, driven by AI demand and the shift to advanced architectures. The company's GaN on silicon technology demonstrated groundbreaking RF performance improvements, potentially opening new market opportunities.

Operating expenses increased due to higher general and administrative costs, with expectations to end 2026 at the high end of projected non-GAAP operating expenses. Full Transcript Mike Bishop, Investor Relations We will begin in just a moment. Hello everyone and welcome to Atomera's second quarter 2026 update call. I'd like to remind everyone that this call and webinar are being recorded, and a replay will be available on Atomera's IR website for one year.

I'm Mike Bishop with the company's Investor Relations. As in prior quarters, we are using Zoom and we will follow a traditional presentation format with participants in a listen-only mode. We will open with prepared remarks from Scott Bibaud, Atomera's President and CEO, and Frank Laurencio, Atomera's CFO. Then we will open the call to questions.

If you are joining by telephone, you may follow a slide presentation to accompany our remarks on the Events and Presentations section of our Investor Relations page on our website. Before we begin, I would like to remind everyone that during today's call we will make forward-looking statements. These forward-looking statements, whether in prepared remarks or during the Q&A, are subject to risks and uncertainties. These risks and uncertainties are detailed in the Risk Factor sections of our filings with the Securities and Exchange Commission, specifically in the Company's Annual Report on Form 10-K filed with the SEC on February 24, 2026.

Except as otherwise required by federal securities laws, Atomera disclaims any obligations to update or make revisions to such forward-looking statements contained herein or elsewhere to reflect changes in expectations with regards to those events, conditions and circumstances. Also, please note, during this call we will be discussing non-GAAP financial measures as defined by SEC regulation. Reconciliations of these non-GAAP financial measures to the most directly comparable GAAP measures are included in today's press release which is posted on our website. Now I would like to turn the call over to our President and CEO, Scott Bibaud.

Go ahead, Scott. Scott Bibaud, President and CEO Thanks, Mike, and good afternoon, everyone. Q2 was a quarter of real momentum. Our customer engagements advanced across each of our target markets.

We've had promising signs of new markets developing, and again we turned a technical breakthrough into the early stages of a genuine commercial pipeline. Today I'll move through gate-all-around, our broader customer activity, the growing pull we're seeing in memory, and then I'll spend real time on GaN where I believe we may be witnessing the opening of a significantly new market for Atomera. Let me start with gate-all-around. By now you all know why this technology transition is so important, so I'll go straight to the news.

We continue to work with two of the four players in this space, and this quarter we passed a significant milestone with one of the two active gate-all-around customers, opening the door to further work on their unique silicon structures. These customers typically ask for a sequence of demonstrations before they'll accept a new material into their process flow, so clearing this stage is a meaningful step rather than a formality. It directly answers the manufacturability questions this customer had put in front of us.

We remain in active discussions with the other two of our four target GAA customers, and our strategic partner continues to provide both the advanced test infrastructure and the ecosystem credibility that enables us to get in the door and helps us to stay there. Memory is an area where interest is clearly accelerating. The large memory manufacturers are under real pressure to add both capacity and performance, and they have the budgets to evaluate options that can help them get there. Up until recently we had significant interest from DRAM customers focused on our value proposition for planar periphery enhancements.

Then suddenly our customers' direction changed. The major underlying factor was that AI demand accelerated and pushed DRAM manufacturers to the vertical scaling era, including 4F squared and 3D DRAM and other advanced architectures. We can be confident from our interactions, however, that the technical merit of our value proposition for planar periphery is strong. Today we've established a new value proposition for 4F squared DRAM validated through discussions with multiple customers.

We have shown that an MST starting wafer enables a vertical DRAM access transistor to be built using a next-generation DRAM fabrication process that is much cheaper than what most of the DRAM industry is currently pursuing. Our new concept solves fundamental device challenges in 4F squared while offering significant cost savings by leveraging MST's precise doping profile control capabilities. In addition to meeting with customers, we have completed a TCAD simulation study demonstrating its feasibility, and the results have been accepted to be presented at an IEEE conference in September.

Traditionally, the technology in NAND flash memory's periphery circuits have lagged far behind DRAM, even though NAND memory cells themselves moved to 3D structures many years ago. In the history of Atomera, we have never established a serious value proposition for flash memory. However, that situation may be changing because in the last few weeks we have learned from a major NAND supplier that AI is now pushing NAND to the point that they need the planar periphery boost that MST can provide. We have spent the last five years perfecting this value proposition for DRAM, and now it is applicable to NAND.

If adopted by NAND flash manufacturers, this more than doubles the TAM for MST, which would obviously be very commercially significant. Turning to the rest of our pipeline, our large IDM customer program continues to progress according to plan. We're now at a stage where new device test data is coming in even as the next batch of experiments gets underway. Development efforts are moving fast, and our teams are working closely together.

We are also working with other companies and engagements in power, and our trench FET and HPT development continues to advance, aimed squarely at the efficiency and high-frequency demands emerging from AI data centers. In RFSOI, wafers are still running with our second JDA partner, and we remain confident they will replicate the positive results we've demonstrated on other customer silicon. Internally, our work on a high-throughput manufacturing process for RFSOI, where the substrate supply chain is crucial, is also going well and may be applicable to multiple other applications.

RF manufacturers have long relied on the characteristics of RFSOI substrates for switch and LNA performance, but they're also interested in future designs using gallium nitride due to its significant performance advantages, including the potential for fully integrated RF front ends including power amplifiers. Unfortunately, due to silicon substrate parasitics, GaN RF development has been mostly limited to GaN on silicon carbide, which is a very expensive specialty starting wafer. Which brings me to the exciting news regarding their preferred starting material, GaN on silicon.

In our May update call, we shared how MST could help solve parasitic channel problems in GaN on silicon, but we hadn't gotten the RF test results that could completely illustrate MST's effect. Later that month, performance data finally arrived and we announced a technical breakthrough: MST makes GaN on silicon for RF devices commercially attractive. Our characterization partner INSIZE has now delivered RF data for MST enabling GaN on silicon that is, frankly, outstanding. The devices deliver effectively lossless RF together with outstanding harmonic distortion performance, leading to exceptional linearity at the benchmark drive level.

Linearity is roughly a thousand times better than the GaN on silicon reference, and that improvement remains two to three orders of magnitude across the full sweep of power. We know of no other GaN on silicon substrate that can duplicate these findings. Just as important, these results approach the linearity and loss figures of advanced trap-rich RFSOI, the technology RF designers typically reach for when they need this class of performance. Our partners at INSIZE independently confirm these benefits on their own world-class baseline, which is exactly the kind of third-party validation customers appreciate.

For more details on our GaN on silicon test results, please see the white paper on our website. In June we took this data to IMS, the International Microwave Symposium, and the results were terrific. Our announcement generated real enthusiasm on the show floor, and as a direct result, we are now working with several new potential customers who want to evaluate MST GaN on silicon in their own designs.

Here's why this matters strategically: because our GaN on silicon results are now approaching RFSOI-class performance, but on a low-cost silicon substrate and with the inherent power and frequency headroom that GaN provides, we believe some designs that would traditionally be built in RFSOI could instead move to GaN on silicon. That would be a meaningful shift in how RF front-end designs get built, and MST's performance may well be the catalyst that sets it in motion.

If new RF design activity begins migrating towards GaN on silicon, Atomera would be positioned right at the start of a new high-growth market, and it's worth underscoring that MST is the enabler on both sides of that shift. So whichever path a customer chooses, Atomera benefits. To summarize, we cleared a key gate-all-around milestone, established a new next-gen value proposition for DRAM, opened a new front in memory with NAND, kept our pipeline moving across power and RFSOI, and turned our GaN breakthrough into hard RF performance data, real industry enthusiasm, and new customers with the potential to seed an entirely new RF market.

This is an exciting time to be at Atomera. With that, I'll turn the call over to our CFO, Frank Laurencio, to review our financials. Frank Laurencio, CFO Thank you, Scott. At the close of the market today, we issued a press release announcing our results for the second quarter of 2026.

This slide shows our summary financials. Revenue in the second quarter was $158,000, consisting of fees for wafer deliveries to customers, primarily to our large IDM customer. 17 per share, in the second quarter of 2025. On a non-GAAP basis, our loss for the second quarter was $5 million, compared to a loss of $4 million in the second quarter of 2025.

2 million in the second quarter of 2025. 3 million in Q2 2025. In the second quarter of 2026 as compared to the prior-year period, non-GAAP R&D expenses increased by $188,000, G&A expenses increased by $828,000, and sales and marketing expenses increased by $225,000. The increase in sales and marketing was mainly due to new executive hires in Q4 2025 and Q1 2026.

2 million in the first quarter of 2026. 8 million in Q1, primarily reflecting higher G&A expense, offset partly by lower R&D expenses. These sequential fluctuations largely reflected timing of expenses for IP legal costs in G&A, which were heavier in Q2, and outsourced metrology activity in R&D, which was more concentrated in Q1. 1 million on March 31, 2026.

5 million in Q2 of last year. We did not sell any shares under our ATM during the second quarter of 2026. As of June 30, 2026, we had 39 million shares outstanding. 6 million of net proceeds from the registered direct offering we closed in Q1, puts us in a strong position to execute on the opportunities ahead of us, and we will continue to be disciplined about controlling costs.

However, we are experiencing cost increases, particularly in our outsourced engineering work. The recent very rapid growth in the semiconductor industry has tightened supply, and our costs of tool leases, metrology and device fabrication are going up. 5 million. We budget for a range of plus or minus $250,000 around that number, and we now expect that we will end the year in the high end of that range.

With that, let me turn the call back over to Scott for a few summary remarks before we open the call up to questions. Scott Bibaud, President and CEO Thanks, Frank. Before we take questions, I want to thank our employees, our customers and our shareholders for their continued support. We're excited about the progress we made this quarter clearing a key GAA milestone, broadening our memory opportunity in DRAM, and turning our GaN breakthrough into real RF results.

We remain focused on translating our growing body of simulation and customer silicon evidence into commercial agreements that drive long-term repeatable revenue and a strong, sustainable business. And we're happy to have you along for the ride. Mike, we will now take questions. Mike Bishop, Investor Relations Thank you, Scott.

If you wish to ask a question, please click the Q&A button at the bottom of the Zoom window. Then feel free to type in your question. I will do my best to aggregate the incoming queries and relay them to management. Alternatively, you can click the Raise Hand button and we may call on you to ask your question live.

Right now, our first question comes from Richard Shannon of Craig-Hallum. Please go ahead. Great. Richard Shannon, Analyst at Craig-Hallum Thanks, Mike, and thanks, Scott and Frank, for letting me ask a few questions here.

A lot of interesting comments here in your prepared remarks. Scott, let me jump into those. First, on gate-all-around, you're characterizing the—and please correct my language here, I probably didn't get a good transcription of exactly what you said—but I think you essentially said one of these customers has accepted a new material into their ecosystem. Can you convey the importance and difficulty of this?

Can you compare it to other dynamics of a similar type in the past in the advanced logic space? And then how would you describe the next steps? How many other significant steps can you describe them? What has a customer told you about what they expect to do and to see from you next?

Scott Bibaud, President and CEO Okay, great. Let me clear up any language from your kind of quasi transcription there. So what we talked about this time is that we've cleared a hurdle with our gate-all-around customers where they have—they have. Well, okay, I'm glad we're actually showing a picture of a gate-all-around structure here, and it shows you just how complicated it is.

And what we expect that gate-all-around customers will do is they will ask us to prove that we can deposit MST in a structure like this and both physically and have a positive electrical result on that over time. And one of the milestones that we passed this quarter is that we did actually show one of those steps that I just talked about. They'll ask us to do a few more. But at some point when we've deposited our technology into, you know, one of their structures, the next step for them is to take it into their own fab and deposit it on their own structure.

They'll keep that secret from us. Those are the very, very critical IP that they won't share with us. And so in order to do that, they would need to take a license from us and then install it in their fab. So I think hopefully that's a clear example of exactly where we are with them and what's left to be done before they would license it and start working towards production.

The other thing you asked is how is that comparable to how other materials are introduced, right? It's unusual to have a material introduced by a third party like us, but it is more common for a company like, let's say, Applied Materials or ASM or Lam to introduce a new material to a customer. So they might say, okay, we know you're having this problem here, and we figured out how you can use our tool and deposit some material in such a way that we think it will solve it for you.